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Unknown Value (x) and High Impedance State (z) in Verilog

Since Verilog is an HDL (Hardware Descriptive Language) so it must be capable of accommodating two most important digital circuit values i.e., unknown value and high impedance states.
In verilog this is occompained by introduction of two symbols (x) and (z). (x) is for unknown values and (z) is for describing high impedance state of any particular node.

For example:

z = 8’b1111_101x;  // last bit of 8 bit binary number is unknown.

z = 10’hx;     // all the bits are unknown.

Important Note:  It is not required to put (x) or (z) in place of every digit, instead placing (x) or (z) once will render all the rest to be the same. For example in 10’hx the placement of x once, makes all of the ten bits assume the value (x). Same is the case for (z)  and zero.